more MBC3 work

This commit is contained in:
2026-03-17 01:46:28 -07:00
parent 037ba0c76d
commit 80e23312de
3 changed files with 48 additions and 69 deletions

View File

@@ -35,13 +35,7 @@ void AddressSpace::determineMBCInfo() {
}
}
bool AddressSpace::MBCWrite(const Word address) {
if (address <= 0x7FFF)
return true;
return false;
}
Byte *AddressSpace::MBCRead(const Word address) {
Byte *AddressSpace::MBCWrite(const Word address) {
if (MBC == MBC1) {
if (address <= 0x1FFF)
return &ramEnable;
@@ -70,8 +64,16 @@ Byte *AddressSpace::MBCRead(const Word address) {
return &ramEnable;
}
} else if (MBC == MBC3 || MBC == MBC3TimerBattery) {
if (address <= 0x1FFF)
return &ramEnable;
} else if (MBC == MBC3Ram || MBC == MBC3RamBattery ||
MBC == MBC3TimerRamBattery) {
if (address <= 0x1FFF)
return &ramEnable;
if (address <= 0x3FFF)
return &romBankRegister;
if (address <= 0x5FFF)
return &ramBankRTCRegister;
}
return &dummyVal;
}
@@ -131,38 +133,16 @@ void AddressSpace::MBCUpdate() {
loadRomBank();
loadRamBank();
} else if (MBC == MBC3 || MBC == MBC3TimerBattery) {
romBankRegister &= 0b11111;
twoBitBankRegister &= 0b11;
selectedRomBank = romBankRegister & 0x7F;
// 512 KiB can only have 8KiB of ram
if (romSize >= 524288) {
if (romBankRegister == 0)
selectedRomBank = (twoBitBankRegister << 5) + 1;
selectedRomBank = (twoBitBankRegister << 5) + romBankRegister;
} else {
if (romBankRegister == 0)
selectedRomBank = 1;
else
selectedRomBank = romBankRegister;
}
loadRomBank();
loadRamBank();
} else if (MBC == MBC3Ram || MBC == MBC3RamBattery ||
MBC == MBC3TimerRamBattery) {
romBankRegister &= 0b11111;
twoBitBankRegister &= 0b11;
selectedRomBank = romBankRegister & 0x7F;
// 512 KiB can only have 8KiB of ram
if (romSize >= 524288) {
if (romBankRegister == 0)
selectedRomBank = (twoBitBankRegister << 5) + 1;
selectedRomBank = (twoBitBankRegister << 5) + romBankRegister;
selectedExternalRamBank = 0;
} else {
if (romBankRegister == 0)
selectedRomBank = 1;
else
selectedRomBank = romBankRegister;
selectedExternalRamBank = twoBitBankRegister;
}
loadRomBank();
loadRamBank();
}
}